crossbar

The dead giveaway is the 'e', the crossbar is too high.

Instead they have a bunch of unwieldy and dangerous ad hoc rules, such as priority-to-the-crossbar-in-T-intersections and priority-to-the-slightly-larger-road-in-4-way-intersections.

They are not fast in either way precisely because they use crossbar as a operand delivery network.

If you plan on wearing a skirt then you shouldn't be riding a bike with a crossbar.

No, this is not memristors (unless you consider PCM to be a memristor) and it has no relation to crossbar-inc.com.

This uses only inter-node communication, which goes over a hub or crossbar on the motherboard.

Well, the obvious project suggestion is to read about challenges of building a larger crossbar, then work on overcoming those challenges.

The important part of memristors is that they can be arranged to form a crossbar latch, which acts like a transistor.

Maybe intel mostly licenses the tech from crossbar, and just scales the production?

If you're building fault-tolerant systems, understanding how #5 Crossbar worked is still worthwhile.

This crossbar latches are very very small, and very low power.

Note that other companies had been working on switched resistance crossbar latches with metal oxides before HP, they just didn't have a fancy name for it.

"not fast in operating frequency" - TTA requires crossbar, which is slow in 2D.

You end up asking for the same system built in the "cloud" that you've built in a colo; Dedicated "fat" machines with lots of memory and disk, all within easy network 'shouting' distance (aka a non-blocking full crossbar bandwidth network) from each other without any confounding network traffic going over your back bone.

Crossbar will be releasing product much earlier.